Logic state analyzers are used to monitor and record sequences of states that occur in a collection of digital signals in a system under test. A "state" is simply any one of the 2.sup.n logical patterns that n-many digital signals may experience. A sequence of addresses or a sequence of fetched instructions are examples of electrical activity describable as states in a microprocessing environment and that can be monitored by a logic state analyzer to record their "state flow".
To monitor the ongoing sequence of states in a system under test a logic state analyzer samples the electrical values of the signals of interest at times determined by one or more clock signals associated with the system under test. The sampled electrical values obtained are compared to thresholds of selected value and polarity to determine their logical values, each of which will be either true or false, one or zero. Each resulting collection of ones and zeros for a sample is a state in the ongoing sequence of states. It is also simply a binary value that may be stored in a memory. A series of such stored values is a record of the activity occurring in the system under test. Such a record may be termed a trace.
To be useful, a logic state analyzer must produce a trace that bears some desired relation to a specified event. The specification of that relation can be simple or complex, and may involve such notions as storage qualification (i.e., not storing a state as a part of the trace unless some qualifying criteria are met) and sequential triggering. These various relations are set out in a trace specification.
The trace itself is often a tabular listing of captured states. shown in the order in which they appeared. Unless some additional mechanism is at hand, the states in the tabular listing will appear as undifferentiated integer numbers in some radix. For example, if the analyzer received thirty-two digital input signals and displayed each input as either a one or a zero, the trace would consist of a table of thirty-two-bit binary integers. Alternatively, the thirty-two bits could appear as "ten and one half" digit octal or eigth-digit hexadecimal integers. Note that whatever scheme is chosen affects the trace specification; qualification states for storage qualification and the sequence states for a sequential trigger are generally expressed in the same form used to display the states in the trace.
It would be desirable if the user could partition the input digital signals into groups and select an individual radix to be associated with each group. For example, one group of the input digital signals may represent an address most conveniently represented in hexadecimal, while another group may be data best depicted in octal. Still another group may be a collection of miscellaneous status and control lines best seen in binary. It would also be convenient if these groups could be assigned symbolic labels for ease in referring to the groups in the trace and in the trace specification. Such grouping, individual radix selection and labelling is accomplished by equipping a logic state analyzer with a mechanism to receive a format specification. The format specification is a user-determined rule of interpretation for the various input digital signals. It specifies which digital signals belong to the same group, what the associated radix is, and what symbolic label refers to each individual group.